MPC953 - LOW VOLTAGE PLL CLOCK DRIVER

Motorola

Datasheet Details

make the MPC953 ideal for use as a zero delay, low skew fanout buffer. The device performance has been tuned and optimized for zero delay performance. The MR/OE input pin will reset the internal counters and tristate the output buffers when driven “high”. If the reference clock (PECL_CLK) is lost or shut down when the MPC953 is in phase.
lock, the output frquency will slew slowly downward. The final VCO frequency will be around TBDMHz. The MPC953 is fully 3.3V compatible and requires no e.

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Published: Aug 8, 2008 |