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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
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The MRFIC Line
Integrated GPS Downconverter
This integrated circuit is intended for GPS receiver applications. The dual conversion design is implemented in Motorola’s low–cost high performance MOSAIC 3 silicon bipolar process and is packaged in a low–cost surface mount TQFP–48 package. In addition to the mixers, a VCO, a PLL and a loop filter are integrated on–chip. Output IF is nominally 9.5 MHz. • 65 dB Minimum Conversion Gain • 5 Volts Operation • 50 mA Typical Current Consumption • Low–Cost, Low Profile Plastic TQFP Package • Device Marking = M1502 www.DataSheet4U.com
MRFIC1502
1.