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SN74LS273 - OCTAL D FLIP-FLOP

Datasheet Summary

Description

The SN54 / 74LS273 is an 8-Bit Parallel Register with a common Clock and common Master Reset.

When the MR input is LOW, the Q outputs are LOW, independent of the other inputs.

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Datasheet preview – SN74LS273

Datasheet Details

Part number SN74LS273
Manufacturer Motorola
File Size 183.89 KB
Description OCTAL D FLIP-FLOP
Datasheet download datasheet SN74LS273 Datasheet
Additional preview pages of the SN74LS273 datasheet.

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Full PDF Text Transcription

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OCTAL D FLIP-FLOP WITH CLEAR The SN54 / 74LS273 is a high-speed 8-Bit Register. The register consists of eight D-Type Flip-Flops with a Common Clock and an asynchronous active LOW Master Reset. This device is supplied in a 20-pin package featuring 0.3 inch lead spacing. SN54/74LS273 • • • • 8-Bit High Speed Register Parallel Register Common Clock and Master Reset Input Clamp Diodes Limit High-Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW) VCC 20 Q7 19 D7 18 D6 17 Q6 16 Q5 15 D5 14 D4 13 Q4 12 CP 11 OCTAL D FLIP-FLOP WITH CLEAR LOW POWER SCHOTTKY 20 1 J SUFFIX CERAMIC CASE 732-03 1 MR 2 Q0 3 D0 4 D1 5 Q1 6 Q2 7 D2 8 D3 9 Q3 10 GND 20 1 N SUFFIX PLASTIC CASE 738-03 PIN NAMES LOADING (Note a) HIGH LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L.
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