UPD98409
Overview
The µPD98409 (NEASCOT-S40CTM) is a high-performance SAR chip for segmentation and reassembly of ATM cells. Provided with a PCI (Peripheral Component Interconnect) bus interface control memory and supporting a MPEG packet transfer engine function to mitigate the workload of the CPU in transferring compressed image data, this chip has ideal specifications for use in a set top box (STB) to interface with an ATM network.
- Conforms to ATM Forum
- PCI bus interface (5/3.3 V, 32/64 bits, 33 MHz) Conforms to PCI Local Bus Specification Revision 2.1
- AAL-5 SAR sublayer and ATM layer functions
- Hardware support of AAL-5 processing (non-AAL-5 processing can be supported in software)
- Supports up to 64 virtual channels (VC) (64-VC control memory)
- Two traffic shapers for transmission scheduling
- MPEG packet transfer engine mitigating the workload of compressed image data transfer by CPU
- Receive FIFO of 12 cells
- PHY device I/F: UTOPIA Level-1 interface (octet/cell level handshake)
- JTAG boundary scan test functions
