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S7A641830M Datasheet 2mx36 & 4mx18 Sync-pipelined Burst Sram

Manufacturer: NETSOL

Overview: S7A643630M SS77AA664413863300MM S7A641830M 2Mx36 & 4Mx18 Sync-Pipelined Burst SRAM 2Mx36 & 4Mx18 Sync-Pipelined Burst SRAM 72Mb Sync. Pipelined Burst SRAM Specification NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. For updates or additional information about Netsol products, please contact to netsol@netsol.co.kr Rev. 1.1 Sep. 2014 -1- S7A643630M S7A641830M 2Mx36 & 4Mx18 Sync-Pipelined Burst SRAM Document Title 2Mx36 & 4Mx18 Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History 0.0 Initial Draft 0.1 Add 165FBGA information 0.2 Change 165FBGA H2 pin to NC from VDD 1.0 Final spec release 1.1 Add 200MHz speed binning Draft Date Sep. 2012 Oct. 2013 Oct. 2013 Nov. 2013 Sep. 2014 Remark Preliminary Preliminary Preliminary Final Final Rev. 1.1 Sep.

This datasheet includes multiple variants, all published together in a single manufacturer document.

Key Features

  • VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply.
  • VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V).
  • Synchronous Operation.
  • 2 Stage Pipelined operation with 4 Burst.
  • On-Chip Address Counter.
  • Self-Timed Write Cycle.
  • On-Chip Address and Control Registers.
  • Byte Writable Function.
  • Global Write Enable Controls a full bus-width write.
  • Power Down State via ZZ Signal.

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