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S7R323682M Datasheet 1mx36 & 2mx18 & 4mx9 Quadruple-ii Bl2 Sram

Manufacturer: NETSOL

Overview: SS77RR332233668822MM SS77RR332211888822MM SS77RR332200998822MM 11MMxx3366 && 22MMxx1188 && 44MMxx99 QQuuaaddrruuppllee--IIII BBLL22 SSRRAAMM 36Mb Quadruple-II BL2 SRAM Specification 165FBGA with Pb & Pb Free (ROHS Compliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or otherwise. For updates or additional information about Netsol products, please contact to netsol@netsol.co.kr Rev. 1.3 Jul. 2014 -1- S7R323682M S7R321882M S7R320982M 1Mx36 & 2Mx18 & 4Mx9 Quadruple-II BL2 SRAM Document Title 1Mx36 & 2Mx18 & 4Mx9 - Bit Quadruple-II Burst Length of 2 SRAM Revision History Rev. No. History 0.0 Initial Draft 1.0 Final spec release Add current spec value 1.1 Change Thermal Resistance θJA value from 20.8°C/W to 16.3°C/W 1.2 Change DLL locking time spec to 1024cycles from 2048cycles 1.3 Correct errata on Setup and Hold Time Remove θJB parameter in thermal resistance Draft Date Mar. 2012 Feb. 2013 Remark Preliminary Final Apr. 2013 Final May 2013 Final Jul. 2014 Final Rev. 1.3 Jul.

Datasheet Details

Part number S7R323682M
Manufacturer NETSOL
File Size 434.34 KB
Description 1Mx36 & 2Mx18 & 4Mx9 Quadruple-II BL2 SRAM
Datasheet S7R323682M-NETSOL.pdf

Key Features

  • 1.8V+0.1V/-0.1V Power Supply.
  • DLL circuitry for wide output data valid window and future fre- quency scaling.
  • I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ -0.1V for 1.8V I/O.
  • Separate independent read and write data ports with concurrent read and write operation.
  • HSTL I/O.
  • Full data coherency, providing most current data.
  • Synchronous pipeline read with self timed early write.
  • Registered address, control.

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