Download the S7R441882M datasheet PDF.
This datasheet also covers the S7R443682M variant, as both devices belong to the same 4mx36 & 8mx18 & 16mx9 quadruple-ii bl2 sram family and are provided as variant models within a single manufacturer datasheet.
General Description
The S7R443682M, S7R441882M and S7R440982M are 150,994,944-bits Quadruple Synchronous Pipelined Burst SRAMs.
They are organized as 4,194,304 words by 36bits for S7R443682M, 8,388,608 words by 18bits for S7R441882M and 16,777,216 words by 9bits for S7R440982M.
Key Features
1.8V+0.1V/-0.1V Power Supply.
DLL circuitry for wide output data valid window and future fre-
quency scaling.
I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/
-0.1V for 1.8V I/O.
Separate independent read and write data ports
with concurrent read and write operation.
HSTL I/O.
Full data coherency, providing most current data.
Synchronous pipeline read with self timed early write.
Full PDF Text Transcription for S7R441882M (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
S7R441882M. For precise diagrams, and layout, please refer to the original PDF.
QQuuaaddrruuppllee--IIII BBLL22 SSRRAAMM 144Mb Quadruple-II BL2 SRAM Specification 165FBGA with Pb & Pb Free (ROHS Compliant) NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the othe
S7R441882M Datasheet
