S7T3236T4M
Description
The S7T3236T4M, S7T3218T4M and S7T3209T4M are 37,748,736-bits Quadruple Synchronous Pipelined Burst SRAMs.
Key Features
- Key Parameters
- 1.8V+0.1V/-0.1V Power Supply
- DLL circuitry for wide output data valid window and future fre
- 0.1V for 1.8V I/O
- Separate independent read and write data ports
- Full data coherency, providing most current data
- Synchronous pipeline read with self timed late write
- Read latency : 2 clock cycles
- Registered address, control and data input/output
- DDR (Double Data Rate) Interface on read and write ports
