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NXP Semiconductors Electronic Components Datasheet

74ABT823 Datasheet

9-bit D-type flip-flop

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Philips Semiconductors
9-bit D-type flip-flop with reset and enable
(3-State)
Product specification
74ABT823
FEATURES
High speed parallel registers with positive edge-triggered D-type
flip-flops
Ideal where high speed, light loading, or increased fan-in are
required with MOS microprocessors
Output capability: +64mA/–32mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Power-up 3-State
Power-up Reset
DESCRIPTION
The 74ABT823 Bus interface Register is designed to eliminate the
extra packages required to buffer existing registers and provide
extra data width for wider data/address paths of buses carrying
parity.
The 74ABT823 is a 9-bit wide buffered register with Clock Enable
(CE) and Master Reset (MR) which are ideal for parity bus
interfacing in high microprogrammed systems.
The register is fully edge-triggered. The state of each D input, one
set-up time before the Low-to-High clock transition is transferred to
the corresponding flip-flop’s Q output.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
tPLH
tPHL
CIN
COUT
ICCZ
Propagation delay
CP to Qn
Input capacitance
Output capacitance
Total supply current
CONDITIONS
Tamb = 25°C; GND = 0V
CL = 50pF; VCC = 5V
VI = 0V or VCC
Outputs disabled;
VO = 0V or VCC
Outputs disabled; VCC =5.5V
TYPICAL
4.4
4
7
500
UNIT
ns
pF
pF
nA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
–40°C to +85°C
74ABT823 N
–40°C to +85°C
74ABT823 D
–40°C to +85°C
74ABT823 DB
–40°C to +85°C
74ABT823 PW
NORTH AMERICA
74ABT823 N
74ABT823 D
74ABT823 DB
74ABT823PW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
D8 10
MR 11
GND 12
24 VCC
23 Q0
22 Q1
21 Q2
20 Q3
19 Q4
18 Q5
17 Q6
16 Q7
15 Q8
14 CE
13 CP
TOP VIEW
SA00227
PIN DESCRIPTION
PIN NUMBER
SYMBOL
1 OE
2, 3, 4, 5, 6,
7, 8, 9, 10
23, 22, 21, 20,
19,18, 17, 16, 15
D0-D8
Q0-Q8
13 CP
14 CE
11 MR
12 GND
24 VCC
FUNCTION
Output enable input
(active-Low)
Data inputs
Data outputs
Clock pulse input (active
rising edge)
Clock enable input
(active-Low)
Master reset input
(active-Low)
Ground (0V)
Positive supply voltage
1995 Sep 06
1 853–1617 15703


NXP Semiconductors Electronic Components Datasheet

74ABT823 Datasheet

9-bit D-type flip-flop

No Preview Available !

Philips Semiconductors
9-bit D-type flip-flop with reset and enable
(3-State)
Product specification
74ABT823
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
2 3 4 5 6 7 8 9 10
D0 D1 D2 D3 D4 D5 D6 D7 D8
13 CP
14 CE
11 MR
1 OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
23 22 21 20 19 18 17 16 15
1
EN
11
R
14
G1
13
1C2
2
2D
3
4
5
6
7
8
9
10
23
22
21
20
19
18
17
16
15
SA00228
SA00229
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING MODE
OE MR
CE
CP
Dn
Q0 – Q8
LL X XX
L Clear
LH L h
LH L l
H Load and read data
L
LH H X
NC Hold
HX X X X
Z High impedance
H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High
clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High
clock transition
NC = No change
X = Don’t care
Z = High impedance “off” state
= Low to High clock transition
= Not a Low-to-High clock transition
LOGIC DIAGRAM
14
CE
13
CP
D0
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8
10
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
CP
D
RQ
RQ
RQ
RR Q
RQ
RQ
RQ
RQ
RQ
11
MR
1
OE
23
Q0
22
Q1
21
Q2
20
Q3
19
Q4
18
Q5
17
Q6
16
Q7
15
Q8
SA00230
1995 Sep 06
2


Part Number 74ABT823
Description 9-bit D-type flip-flop
Maker NXP
Total Page 7 Pages
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