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74ABT899 - 9-bit dual latch transceiver

Key Features

  • Symmetrical (A and B bus functions are identical).
  • Selectable generate parity or ”feed-through” parity for A-to-B and B-to-A directions.
  • Independent transparent latches for A-to-B and B-to-A directions.
  • Selectable ODD/EVEN parity.
  • Continuously checks parity of both A bus and B bus latches as ERRA and ERRB.
  • Ability to simultaneously generate and check parity.
  • Can simultaneously read/latch A and B bus data.
  • Output capability:.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS 74ABT899 9-bit dual latch transceiver with 8-bit parity generator/checker (3-State) Product specification Supersedes data of 1993 Oct 04 IC23 Data Handbook 1998 Jan 16 Philips Semiconductors Philips Semiconductors 9-bit dual latch transceiver with 8-bit parity generator/checker (3-State) Product specification 74ABT899 FEATURES • Symmetrical (A and B bus functions are identical) • Selectable generate parity or ”feed-through” parity for A-to-B and B-to-A directions • Independent transparent latches for A-to-B and B-to-A directions • Selectable ODD/EVEN parity • Continuously checks parity of both A bus and B bus latches as ERRA and ERRB • Ability to simultaneously generate and check parity • Can simultaneously read/latch A and B bus data • Output capability: +64 mA/