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74AHC1G00 Datasheet

2-input NAND gate

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INTEGRATED CIRCUITS
DATA SHEET
74AHC1G00; 74AHCT1G00
2-input NAND gate
Product specification
Supersedes data of 1998 Nov 25
File under Integrated Circuits, IC06
1999 Jan 27


NXP Semiconductors Electronic Components Datasheet

74AHC1G00 Datasheet

2-input NAND gate

No Preview Available !

Philips Semiconductors
2-input NAND gate
Product specification
74AHC1G00; 74AHCT1G00
FEATURES
Symmetrical output impedance
High noise immunity
ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
Low power dissipation
Balanced propagation delays
Very small 5-pin package
Output capability: standard.
DESCRIPTION
The 74AHC1G/AHCT1G00 is a
high-speed Si-gate CMOS device.
The 74AHC1G/AHCT1G00 provides
the 2-input NAND function.
FUNCTION TABLE
See note 1.
INPUTS
inA inB
LL
LH
HL
HH
OUTPUT
outY
H
H
H
L
Note
1. H = HIGH voltage level.
L = LOW voltage level.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.
SYMBOL
PARAMETER
TYPICAL
CONDITIONS
UNIT
AHC1G AHCT1G
tPHL/tPLH propagation delay CL = 15 pF 3.5 3.6 ns
inA, inB to outY
VCC = 5 V
CI input capacitance
1.5 1.5 pF
CPD power dissipation notes 1 and 2; 17 18 pF
capacitance
CL = 50 pF;
f = 1 MHz
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V.
2. The condition is VI = GND to VCC.
PINNING
PIN
1
2
3
4
5
SYMBOL
inB
inA
GND
outY
VCC
DESCRIPTION
data input
data input
ground (0 V)
data output
DC supply voltage
ORDERING AND PACKAGE INFORMATION
TYPE NUMBER
74AHC1G00GW
74AHCT1G00GW
TEMPERATURE
RANGE
40 to +85 °C
PINS
5
5
PACKAGES
PACKAGE
SC-88A
SC-88A
MATERIAL
plastic
plastic
CODE
SOT353
SOT353
MARKING
AA
CA
1999 Jan 27
2


Part Number 74AHC1G00
Description 2-input NAND gate
Maker NXP
Total Page 12 Pages
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