74AHC2G00 Datasheet | NXP Semiconductors

INTEGRATED CIRCUITS DATA SHEET 74AHC2G00; 74AHCT2G00 2-input NAND gate Product specification 2004 Jan 21 Philips Semiconductors Product specification 2-input NAND gate Features - Symmetrical output impedance - High noise immunity - ESD protection: - HBM EIA/JESD22-A114-A exceeds 2000 V - MM EIA/JESD22-A115-A exceeds 200 V - CDM EIA/JESD22-C101 exceeds 500 V. - Low power dissipation - Balanced propagation delays - SOT505-2 and SOT765-1 package - Specified from - 40 to +85 °C and - 40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. 74AHC2G00; 74AHCT2G00 DESCRIPTION The 74AHC2G/AHCT2G00 is a high-speed Si-gate CMOS device. The 74AHC2G/AHCT2G00 provides the 2-input NAND gate function. TYPICAL SYMBOL t PHL/t PLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in p F; VCC = supply voltage in Volts; N = total load switching outputs; Σ(CL × VCC2 × fo) = sum of the outputs. 2. The condition is VI = GND to VCC. PARAMETER propagation delay n A and n B to n Y input capacitance power dissipation capacitance per gate CL = 50 p F; f = 1 MHz; notes 1 and 2 CONDITIONS AHC2G CL = 15 p F; VCC = 5 V 3.5 1.5 17 AHCT2G 3.6 1.5 18 ns p F p F UNIT 2004 Jan 21 Philips Semiconductors Product specification 2-input NAND gate FUNCTION TABLE See note 1. INPUT n A L L H H Note 1. H = HIGH voltage level; L = LOW voltage level. ORDERING INFORMATION n B L H L H 74AHC2G00; 74AHCT2G00 OUTPUT n Y H H H...