74AHCT1G125
FEATURES
- Symmetrical output impedance
- High noise immunity
- ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V
- Low power dissipation
- Balanced propagation delays
- Very small 5-pin package
- Output capability: standard. DESCRIPTION
The 74AHC1G/AHCT1G125 is a high-speed Si-gate CMOS device. The 74AHC1G/AHCT1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output to assume a high-impedance OFF-state. FUNCTION TABLE See note 1. INPUTS OE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF state. ORDERING INFORMATION in A L H X OUTPUT out Y L H Z Notes
74AHC1G125; 74AHCT1G125
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. TYPICAL SYMBOL t PHL/t PLH CI CPD PARAMETER propagation delay in A to out Y input capacitance power dissipation capacitance CL = 50 p F; f = 1 MHz; notes 1...
