74ALS273 flip-flop equivalent, octal d-type flip-flop.
* Eight edge-triggered D-type flip-flops
* Buffered common clock
* Buffered asynchronous master reset
* See 74ALS377 for clock enable version
* See 7.
where the true output only is required and the CP and MR are common to all flip-flops. TYPICAL SUPPLY CURRENT (TOTAL) 16.
The 74ALS273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The register is fully edge-triggered. The state .
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