logo
Datasheet4U.com - 74AUC1G00 gate
logo

74AUC1G00 Datasheet, NXP

74AUC1G00 Datasheet, NXP

74AUC1G00

datasheet Download (Size : 50.14KB)

74AUC1G00 Datasheet

74AUC1G00 gate

single 2-input nand gate.

single 2-input nand gate.

74AUC1G00

datasheet Download (Size : 50.14KB)

74AUC1G00 Datasheet

74AUC1G00 Features and benefits

74AUC1G00 Features and benefits


* Wide supply voltage range from 0.8 to 2.7 V
* Performance optimised for VCC = 1.8 V
* High noise immunity
* Complies with JEDEC standard:
 &nbs.

74AUC1G00 Application

74AUC1G00 Application

using Ioff. The Ioff circuitry disables the output, preventing the damaging current backflow through the device when it .

74AUC1G00 Description

74AUC1G00 Description

74AUC1G00 The 74AUC1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device. Schmitt-trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. This device is fully specified for partial power-down a.

Image gallery

74AUC1G00 Page 1 74AUC1G00 Page 2 74AUC1G00 Page 3

<?=74AUC1G00?> Page 2 <?=?> Page 3

TAGS

74AUC1G00
Single
2-input
NAND
gate
NXP

Manufacturer


NXP (https://www.nxp.com/)

Related datasheet

74AUC1G00GV

74AUC1G00GW

74AUC1G02

74AUC1G02GV

74AUC1G02GW

74AUC1G08

74AUC1G08GV

74AUC1G08GW

74AUP1G00

74AUP1G00-Q100

74AUP1G02

74AUP1G02-Q100

74AUP1G04

Since 2006. D4U Semicon.   |   Datasheet4U.com   |   Contact Us   |   Privacy Policy   |   Purchase of parts