s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 .

using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it i.

The 74AUP1G86 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the e.

74AUP1G80

74AUP1G86-Q100

74AUP1G86FS3-7

74AUP1G885

74AUP1G00

74AUP1G00-Q100

74AUP1G02

74AUP1G02-Q100

74AUP1G04

74AUP1G04-Q100

74AUP1G06

74AUP1G06-Q100

74AUP1G07