74F126 Datasheet | NXP Semiconductors

FEATURE - High impedance NPN base inputs for reduced loading (20µA in High and Low states) ORDERING INFORMATION DESCRIPTION 14-pin plastic DIP 14-pin plastic SO MERCIAL RANGE VCC = 5V ±10%, Tamb = 0°C to +70°C N74F125N, N74F126N N74F125D, N74F126D PKG DWG # SOT27-1 SOT108-1 TYPE 74F125 74F126 TYPICAL PROPAGATION DELAY 5.0ns 5.0ns TYPICAL SUPPLY CURRENT (TOTAL) 23m A 26m A INPUT AND OUTPUT LOADING AND FAN OUT TABLE PINS D0- D3 OE0- OE3 OE0- OE3 Q0- Q3 Data inputs Output Enable inputs (active Low), 74F125 Output Enable inputs (active High), 74F126 Data outputs DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/0.033 1.0/0.033 1.0/0.033 750/106.7 LOAD VALUE HIGH/LOW 20µA/20µA 20µA/20µA 20µA/20µA 15m A/64m A NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6m A in the Low state. PIN CONFIGURATIONS 74F125 OE0 D0 Q0 OE1 D1 Q1 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC OE3 D3 Q3 OE2 D2 Q2 OE0 D0 Q0 OE1 D1 Q1 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC OE3 D3 Q3 OE2 D2 Q2 SF00117 SF00118 LOGIC SYMBOLS 74F125 2 5 9 12 2 5 9 12 D0 1 4 10 13 OE0 OE1 OE2 OE3 Q0 D1 D2 D3 1 4 10 13 OE0 OE1 OE2 OE3 D0 D1 D2 D3 Q0 Q1 Q1 Q0 Q0 Q1 Q1 VCC = Pin 14 GND = Pin...