74F1763
Overview
- DRAM signal timing generator
- Automatic refresh circuitry
- Selectable row address hold and RAS precharge times
- Facilitates page mode accesses
- Controls 1 MBit DRAMs
- Intelligent burst-mode refresh after page-mode access cycles
| Part | 74F1763 |
|---|---|
| Description | Intelligent DRAM controller |
| Manufacturer | NXP Semiconductors |
| Size | 117.46 KB |
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