I Wide operating voltage 2.0 V to 6.0 V I Input levels: N For 74HC05: CMOS level I Latch-up performance exceeds 100 mA per JESD 78 Class II level A I ESD protection: N H.

The 74HC05 is a high-speed Si-gate CMOS device that complies with JEDEC standard no. 7A. The 74HC05 contains six inverters.The outputs of the 74HC05 are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or .

74HC00

74HC00-Q100

74HC00D

74HC00S14

74HC00T14

74HC01

74HC02

74HC02-Q100

74HC02AP

74HC02D

74HC03

74HC03-Q100

74HC03D