Datasheet4U Logo Datasheet4U.com

74HC4060-Q100 - 14-stage binary ripple counter

Description

The 74HC4060-Q100; 74HCT4060-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no.

7A.

They are pin compatible with Low-power Schottky TTL (LSTTL).

Features

  • Automotive product qualification in accordance with AEC-Q100 (Grade 1).
  • Specified from 40 C to +85 C and from 40 C to +125 C.
  • All active components on chip.
  • RC or crystal oscillator configuration.
  • ESD protection:.
  • MIL-STD-883, method 3015 exceeds 2000 V.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ).
  • Multiple package options 3.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
74HC4060-Q100 14-stage binary ripple counter nexperia
74HC4060 14-STAGE ASYNCHRONOUS BINARY COUNTERS/OSCILLATORS Texas Instruments
74HC4060 14-stage binary ripple counter NXP Semiconductors
74HC4060 14-stage binary ripple counter nexperia
74HC4060BQ 14-stage binary ripple counter nexperia

Other Datasheets by NXP Semiconductors

Part Number Description
74HC4066 Quad single-pole single-throw analog switch
74HC4067 16-Channel Analog Multiplexer / Demultiplexer
74HC4002 Dual 4-input NOR gate
74HC4002-Q100 Dual 4-input NOR gate
74HC4002D-Q100 Dual 4-input NOR gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
74HC4060-Q100; 74HCT4060-Q100 14-stage binary ripple counter with oscillator Rev. 2 — 10 April 2013 Product data sheet 1. General description The 74HC4060-Q100; 74HCT4060-Q100 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC4060-Q100; 74HCT4060-Q100 are 14-stage ripple-carry counter/dividers and oscillators with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (Q3 to Q9 and Q11 to Q13) and an overriding asynchronous master reset (MR). The oscillator configuration allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. In this case keep the other oscillator pins (RTC and CTC) floating.
Published: |