Full PDF Text Transcription for 74HC4094 (Reference)
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74HC4094. For precise diagrams, and layout, please refer to the original PDF.
74HC4094; 74HCT4094 8-stage shift-and-store bus register Rev. 7 — 10 February 2016 Product data sheet 1. General description The 74HC4094; 74HCT4094 is an 8-bit serial-in...
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t 1. General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow.
74HC4094 Datasheet
