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74LV138 - 3-to-8 line decoder/demultiplexer

Datasheet Summary

Description

The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138.

The 74LV138 is a 3-to-8 line decoder/demultiplexer.

Features

  • Wide operating voltage: 1.0 V to 5.5 V.
  • Optimized for low voltage.

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Datasheet preview – 74LV138

Datasheet Details

Part number 74LV138
Manufacturer NXP
File Size 154.62 KB
Description 3-to-8 line decoder/demultiplexer
Datasheet download datasheet 74LV138 Datasheet
Additional preview pages of the 74LV138 datasheet.

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Full PDF Text Transcription

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74LV138 3-to-8 line decoder/demultiplexer; inverting Rev. 4 — 4 March 2016 Product data sheet 1. General description The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138. The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW outputs (Y0 to Y7). There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74LV138 devices and one inverter.
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