74LVC1G07 - Buffer

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NXP

74LVC1G07 Buffer by NXP - Datasheet Preview — Datasheet preview – 74LVC1G07

Datasheet Details

Part number	74LVC1G07
Manufacturer	NXP
File Size	67.76 KB
Description	Buffer
Datasheet	74LVC1G07 Datasheet
Additional preview pages of the 74LVC1G07 datasheet.

Product details

Description

74LVC1G07 The 74LVC1G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.The input can be driven from either 3.3 or 5 V devices.This feature allows the use of this device as translator in a mixed 3.3 and 5 V environment.Schmitt trigger action at the input makes the circuit tolerant for slower input rise and fall time.The 74LVC1G07 provides the non-inverting buffer.The output of the device is an open drain and can be

Features

Wide supply voltage range from 1.65 to 5.5 V.
High noise immunity.
Complies with JEDEC standard:.
JESD8-7 (1.65 to 1.95 V).
JESD8-5 (2.3 to 2.7 V).
JESD8B/JESD36 (2.7 to 3.6 V).
24 mA output drive (VCC = 3.0 V).
CMOS low power consumption.
Latch-up performance ≤250 mA.
Direct interface with TTL levels.
Inputs accept voltages up to 5 V.
SOT353 package. QUICK.

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74LVC1G04 - Single inverter (nexperia)
74LVC1G04-Q100 - Single inverter (nexperia)
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Other Datasheets by NXP

74LVC1G11 - Single 3-input AND gate
74LVC1G123 - Single retriggerable monostable multivibrator
74LVC1G126 - Bus buffer/line driver
74LVC1G14 - Single Schmitt-trigger inverter
74LVC1G17 - Single Schmitt-trigger buffer
74LVC1G175-Q100 - Single D-type flip-flop

Published: Mar 22, 2005 |