AU5780 Datasheet | NXP Semiconductors

FEATURES multiplexing - Supports SAE/J1850 VPW standard for in-vehicle class B - Bus speed 10.4 kbps nominal - Drive capability 32 bus nodes - Low RFI due to output waveshaping with adjustable slew rate - Direct battery operation with protection against +50V load dump, jump start and reverse battery DESCRIPTION The AU5780A is a line transceiver being primarily intended for in-vehicle multiplex applications. It provides interfacing between a link controller and the physical bus wire. The device supports the SAE/J1850 VPWM standard with a nominal bus speed of 10.4 kbps. PIN CONFIGURATION - Bus terminals proof against automotive transients up to - 200V/+200V BATT 1 8 GND - Thermal overload protection - Very low bus idle power consumption - Diagnostic loop-back mode - 4X mode (41.6 kbps) reception capability - ESD protected to 9 KV on bus and battery pins - 8-pin SOIC 2 AU5780A BUS_OUT R/F /LB 4 SO8 BUS_IN SL01207 QUICK REFERENCE DATA SYMBOL VBATT.op TA VBATT.ld IBATT.lp VB VBOH - IBO.LIM VBI tbo tr, tf PARAMETER Operating supply voltage Operating ambient temperature Battery voltage Bus idle supply current Bus voltage Bus output voltage Bus output source current Bus input threshold Delay TX to BUS_OUT, normal battery BUS_OUT transition times, rise and fall, normal battery Measured at 3.875V Measured between 1.5 V and (VBATT - 2.75 V), 9 < VBATT < 16 V, tr tested at an additional bus load of RLOAD = 400 W and CLOAD = 22000 p F load dump; 1s VBATT=12V 0 < VBATT < 24V 300Ω < RL < 1.6kΩ 0V < VBO < +6.0V - 20 7.3 27 3.65 13 11 CONDITIONS MIN. 6 - 40 TYP. 12 MAX. 24 +125 +50 220 +20 8.0 50 4.1 21 18 UNIT V °C V µA V V m A V µs µs ORDERING INFORMATION DESCRIPTION SO8: 8-pin plastic small outline package TEMPERATURE...