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NXP Semiconductors Electronic Components Datasheet

HEF40175B Datasheet

Quadruple D-type flip-flop

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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF40175B
MSI
Quadruple D-type flip-flop
Product specification
File under Integrated Circuits, IC04
January 1995


NXP Semiconductors Electronic Components Datasheet

HEF40175B Datasheet

Quadruple D-type flip-flop

No Preview Available !

Philips Semiconductors
Quadruple D-type flip-flop
Product specification
HEF40175B
MSI
DESCRIPTION
The HEF40175B is a quadruple edge-triggered D-type
flip-flop with four data inputs (D0 to D3), a clock input (CP),
an overriding asynchronous master reset input (MR), four
buffered outputs (O0 to O3), and four complementary
buffered outputs (O0 to O3). Information on D0 to D3 is
transferred to O0 to O3 on the LOW to HIGH transition of
CP if MR is HIGH. When LOW, MR resets all flip-flops
(O0 to O3 = LOW, O0 to O3 = HIGH), independent of CP
and D0 to D3.
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
HEF40175BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF40175BD(F): 16-lead DIL; ceramic (cerdip)
(SOT74)
HEF40175BT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
January 1995
PINNING
D0 to D3
CP
MR
O0 to O3
O0 to O3
data inputs
clock input (LOW to HIGH; edge-triggered)
master reset input (active LOW)
buffered outputs
complementary buffered outputs
FUNCTION TABLE
INPUTS
CP D
H
MR
H
OUTPUTS
OO
HL
LH
L
H
X H no change no change
XX L
L
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
= negative-going transition
H
2


Part Number HEF40175B
Description Quadruple D-type flip-flop
Maker NXP
Total Page 5 Pages
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