HEF4585B Datasheet | NXP Semiconductors

DESCRIPTION The HEF4585B is a 4-bit magnitude parator which pares two 4-bit words (A and B), whether they are ‘less than’, ‘equal to’, or ‘greater than’. Each word has four parallel inputs (A0 to A3 and B0 to B3); A3 and B3 being the most significant inputs. Three outputs are provided; A greater than B (OA > B), A less than B (OA < B) and A equal to B (OA = B). Three expander inputs (IA > B, IA < B and IA = B) allow cascading of the devices without external gates. HEF4585B MSI For proper pare operation the expander inputs to the least significant position must be connected as follows: IA = B = IA > B = HIGH, IA < B = LOW. For words greater than 4-bits, units can be cascaded by connecting outputs OA < B and OA = B to the corresponding inputs of the next significant parator (input IA > B is connected to a HIGH). Operation is not restricted to binary codes, the devices will work with any monotonic code. The function table describes the operation of the device under all possible logic conditions. Fig.2 Pinning diagram. HEF4585BP(N): HEF4585BD(F): HEF4585BT(D): 16-lead DIL; plastic (SOT38-1) 16-lead DIL; ceramic (cerdip) (SOT74) 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America PINNING A0 to A3 Fig.1 Functional diagram. B0 to B3 OA > B OA < B OA = B word A parallel inputs word B parallel inputs A greater than B output A less than B output A equal to B output IA > B, IA < B, IA = B expander inputs FAMILY DATA, IDD LIMITS category MSI See Family Specifications January 1995 Philips Semiconductors Product specification 4-bit magnitude parator HEF4585B MSI Fig.3 Logic diagram. January 1995 Philips Semiconductors Product specification 4-bit magnitude parator FUNCTION TABLE PARING INPUTS A3, B3 A3 > B3 A3 < B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 A3 = B3 Notes 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial A2, B2 X X A2 > B2 A2 < B...