HSTL16919 latch equivalent, hstl-to-lvttl memory address latch.
* Inputs meet JEDEC HSTL Std. JESD 8 –6, and outputs meet Level III specifications PIN CONFIGURATION 2Q1 1Q1 GND D1 D2 VCC D3 D4 1 2 3 4 5 6 7 8 9 48.
Image gallery
TAGS