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NXP Semiconductors Electronic Components Datasheet

LD6915 Datasheet

Dual low-dropout regulators

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LD6915 pdf
LD6915 series
Dual low-dropout regulators, low noise, 150 mA
Rev. 1 — 8 July 2013
Objective data sheet
1. Product profile
1.1 General description
The LD6915 series consists of small-size dual Low DropOut regulators (LDO). Each
device delivers two times 150 mA with a typical voltage drop of 120 mV at 150 mA for
each LDO. The system offers two individual fixed nominal output voltages (VO(nom)) from
1.2 V to 3.6 V with high Power Supply Rejection Ratio (PSRR) of 80 dB.
The LDO has an integrated Soft start to control the inrush current during start-up. The
output mode, when disabled, can be high-ohmic 3-state or auto discharge. Optionally a
delayed output circuit is available for the second output. The devices are available in
DFN1212-6 (SOT1229) package with a maximum height of 0.4 mm.
1.2 Features and benefits
Extremely low standby current in shutdown mode (0.1 A)
Low quiescent current
Fast turn-on time
Safety features (temperature watchdog, current limiter and foldback circuit)
Delayed output circuit for second LDO (optional)
High PSRR
Auto discharge or high-ohmic mode for output when disabled
DFN1212-6 (SOT1229) with 0.4 mm pitch and package size of 1.2 1.2 0.4 mm
Pb-free, Restriction of Hazardous Substances (RoHS) compliant, free of halogen and
antimony (Dark Green compliant)
1.3 Applications
Smartphones
Mobile handsets
Digital still cameras
Tablet PCs
Mobile internet devices
Portable media players
1.4 Quick reference data
IO = 150 mA for each LDO
PSRR = 80 dB at 1 kHz
RMS noise Vn(o)RMS = 60 V
at 10 Hz to 100 kHz
tstartup(reg) = 150 s
VI = 1.75 V to 5.5 V
VO = 1.2 V to 3.6 V (fixed value)
Dropout voltage Vdo = 120 mV
at IO = 150 mA for each LDO
Quiescent current Iq = 2 35 A at
IO = 0 mA


NXP Semiconductors Electronic Components Datasheet

LD6915 Datasheet

Dual low-dropout regulators

No Preview Available !

LD6915 pdf
NXP Semiconductors
2. Pinning information
2.1 Pinning
LD6915 series
Dual low-dropout regulators, low noise, 150 mA
16
25
34
Transparent top view
Fig 1. Pin configuration for DFN1212-6 (SOT1229)
2.2 Pin description
Table 1.
Symbol
OUT1
OUT2
GND
EN2
IN
EN1
i.c.
Pin description for DFN1212-6 (SOT1229)
Pin Description
1 regulator 1 output voltage
2 regulator 2 output voltage
3 supply ground
4 regulator 2 enable input
5 supply voltage input
6 regulator 1 enable input
TAB
internal connected [1]
[1] The TAB is GND level (it is placed on the reverse side of the IC).
It is recommended to connect the TAB to GND. Leaving it unconnected is also allowed but it may result in
lower thermal performance.
LD6915_SER
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 8 July 2013
© NXP B.V. 2013. All rights reserved.
2 of 25


Part Number LD6915
Description Dual low-dropout regulators
Maker NXP
Total Page 25 Pages
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