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LPC1787 - (LPC177x / LPC178x) 32-bit ARM Cortex-M3 microcontroller

Download the LPC1787 datasheet PDF. This datasheet also covers the LPC177x variant, as both devices belong to the same (lpc177x / lpc178x) 32-bit arm cortex-m3 microcontroller family and are provided as variant models within a single manufacturer datasheet.

General Description

The LPC178x/7x is an ARM Cortex-M3 based microcontroller for embedded applications requiring a high level of integration and low power dissipation.

Key Features

  • Functional replacement for the LPC23xx and LPC24xx family devices.
  • System:.
  • ARM Cortex-M3 processor, running at frequencies of up to 120 MHz. A Memory Protection Unit (MPU) supporting eight regions is included.
  • ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
  • Multilayer AHB matrix interconnect provides a separate bus for each AHB master. AHB masters include the CPU,USB, Ethernet, and the General Purpose DMA controller. This interconnect provides co.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (LPC177x_NXP.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by NXP Semiconductors

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LPC1785 (LPC177x / LPC178x) 32-bit ARM Cortex-M3 microcontroller
LPC1786 (LPC177x / LPC178x) 32-bit ARM Cortex-M3 microcontroller
LPC1788 (LPC177x / LPC178x) 32-bit ARM Cortex-M3 microcontroller
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
LPC178x/7x 32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 96 kB SRAM; USB Device/Host/OTG; Ethernet; LCD; EMC Rev. 4.1 — 15 November 2012 Product data sheet 1. General description The LPC178x/7x is an ARM Cortex-M3 based microcontroller for embedded applications requiring a high level of integration and low power dissipation. The Cortex-M3 is a next generation core that offers better performance than the ARM7 at the same clock rate and other system enhancements such as modernized debug features and a higher level of support block integration. The Cortex-M3 CPU incorporates a 3-stage pipeline and has a Harvard architecture with separate local instruction and data buses, as well as a third bus with slightly lower performance for peripherals.