LPC5514 Datasheet | NXP Semiconductors

LPC55S1x/LPC551x 32-bit Arm Cortex®-M33, Trust Zone, PRINCE, CASPER, 96 KB SRAM; 256 KB flash, USB HS, Flexm Interface, CAN FD, 32-bit counter/ timers, SCTimer/PWM, PLU, 16-bit 2.0 Msamples/sec ADC, parator, Temperature Sensor, AES, PUF, SHA, CRC, RNG Rev. 1.8 - 29 September 2022 Product data sheet 1. General description The LPC55S1x/LPC551x is an Arm Cortex-M33 based microcontroller for embedded applications. These devices include CASPER Crypto engine, up to 256 KB on-chip flash, up to 96 KB of on-chip SRAM, PRINCE module for on-the-fly flash encryption/decryption, Code Watchdog, high-speed/full-speed USB host and device interface with crystal-less operation for full-speed, CAN FD, five general-purpose timers, one SCTimer/PWM, one RTC/alarm timer, one 24-bit Multi-Rate Timer (MRT), a Windowed Watchdog Timer (WWDT), nine flexible serial munication peripherals (which can be configured as a USART, SPI, high speed SPI, I2C, or I2S interface), Programmable Logic Unit (PLU), one 16-bit 2.0 Msamples/sec ADC capable of simultaneous conversions, parator, and temperature sensor . The Arm Cortex-M33 provides a security foundation, offering isolation to protect valuable IP and data with Trust Zone® technology. It simplifies the design and software development of digital signal control systems with the integrated digital signal processing (DSP) instructions. To support security requirements, the LPC55S1x/LPC551x also offers support for secure boot, HASH, AES, RSA, UUID, DICE, dynamic encrypt and decrypt, debug authentication, and TBSA pliance. 2. Features and benefits - Arm Cortex-M33 core (r0p4): - Running at a frequency of up to 150 MHz. - Integrated digital signal processing (DSP) instructions. - Trust Zone®, Floating Point Unit (FPU) and Memory Protection Unit (MPU). - Arm Cortex M33 built-in Nested Vectored Interrupt Controller (NVIC). - Non-maskable Interrupt (NMI) input with a selection of sources. - Serial Wire Debug with eight breakpoints and four...