32-bit ARM Cortex-M0+ microcontroller
State Configurable Timer/PWM (SCTimer/PWM) with input and output functions
(including capture and match) assigned to pins through the switch matrix.
Multiple-channel multi-rate timer (MRT) for repetitive interrupt generation at up to
four programmable, fixed rates.
Self Wake-up Timer (WKT) clocked from either the IRC or a low-power,
low-frequency internal oscillator.
Windowed Watchdog timer (WWDT).
Comparator with internal and external voltage references with pin functions
assigned or enabled through the switch matrix.
Three USART interfaces with pin functions assigned through the switch matrix.
Two SPI controllers with pin functions assigned through the switch matrix.
One I2C-bus interface with pin functions assigned through the switch matrix.
12 MHz internal RC oscillator trimmed to 1.5 % accuracy that can optionally be
used as a system clock.
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
Programmable watchdog oscillator with a frequency range of 9.4 kHz to 2.3 MHz.
10 kHz low-power oscillator for the WKT.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator, the external clock
input CLKIN, or the internal RC oscillator.
Clock output function with divider that can reflect the crystal oscillator, the main
clock, the IRC, or the watchdog oscillator.
Integrated PMU (Power Management Unit) to minimize power consumption.
Reduced power modes: Sleep mode, Deep-sleep mode, Power-down mode, and
Deep power-down mode.
Wake-up from Deep-sleep and Power-down modes on activity on USART, SPI, and
Timer-controlled self wake-up from Deep power-down mode.
Power-On Reset (POR).
Unique device serial number for identification.
Single power supply.
Operating temperature range 40 °C to 105 °C except for the DIP8 package, which is
available for a temperature range of 40 °C to 85 °C.
Available as DIP8, TSSOP16, SO20, TSSOP20, and XSON16 package.
Product data sheet
Fire and security applications
All information provided in this document is subject to legal disclaimers.
Rev. 4.7 — 19 March 2021
© NXP Semiconductors N.V. 2021. All rights reserved.
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