MC56F82348 Datasheet | NXP Semiconductors

Features - This family of digital signal controllers (DSCs) is based on the 32-bit 56800EX core. Each device bines, on a single chip, the processing power of a DSP and the functionality of an MCU with a flexible set of peripherals to support many target applications: - Industrial control - Home appliances - Smart sensors - Wireless charging - Power distribution systems - Motor control (ACIM, BLDC, PMSM, SR, stepper) - Photovoltaic systems - Circuit breaker - Medical device/equipment - Instrumentation - DSC based on 32-bit 56800EX core - Up to 50 MIPS at 50 MHz core frequency - DSP and MCU functionality in a unified, C-efficient architecture - On-chip memory - Up to 64 KB flash memory - Up to 8 KB data/program RAM - On-chip flash memory and RAM can be mapped into both program and data memory spaces - Analog - Two high-speed, 8-channel, 12-bit ADCs with dynamic x1, x2, and x4 programmable amplifier - Four analog parators with integrated 6-bit DAC references - Up to two 12-bit digital-to-analog converters (DAC) - One Flex PWM module with up to 8 PWM outputs Document Number MC56F82348MLH Rev. 2, 07/2020 MC56F82348MLH - munication interfaces - Up to two high-speed queued SCI (QSCI) modules with LIN slave functionality - Up to two queued SPI (QSPI) modules - One I2C/SMBus port - One Modular/Scalable Controller Area Network (MSCAN) module - Timers - One 16-bit quad timer (1 x 4 16-bit timer) - Two Periodic Interval Timers (PITs) - Security and integrity - Cyclic Redundancy Check (CRC) generator - Windowed puter operating properly (COP) watchdog - External Watchdog Monitor (EWM) - Clocks - Two on-chip relaxation oscillators: 8 MHz (400 k Hz at standby mode) and 200 k...