MC9S12KG128 Datasheet | NXP Semiconductors

Description Change SCI from V1 to V2, Chagne ATD from V1 to V3. Update TIM block guide. Update mask set Table 1-7, add Section 1.7 ATD External Trigger Input Connection Chapter 1 MC9S12KG128 Device Overview (MC9S12KG128V1) - . . 17 Chapter 2 128 Kbyte ECC Flash Module (S12FTS128K1ECCV1)- . . 73 Chapter 3 2 Kbyte EEPROM Module (S12EETS2KV1) - - . . . . 117 Chapter 4 Port Integration Module (PIM9KG128V1) - - - . 137 Chapter 5 Clocks and Reset Generator (CRGV4) Block Description . . 177 Chapter 6 Pierce Oscillator (S12OSCLCPV1) - - - - . 213 Chapter 7 Analog-to-Digital Converter (ATD10B16CV3) - - . . 219 Chapter 8 Inter-Integrated Circuit (IICV2) - - - - . . . . 249 Chapter 9 Freescale’s Scalable Controller Area Network (S12MSCANV2). 273 Chapter 10 Serial munications Interface (S12SCIV2) - - . . 329 Chapter 11 Serial Peripheral Interface (SPIV3) - - - - . 359 Chapter 12 Pulse-Width Modulator (S12PWM8B8CV1) - - . . . . 381 Chapter 13 Timer Module (TIM16B8CV1) - - - - - 413 Chapter 14 Dual Output Voltage Regulator (VREG3V3V2) - - . 441 Chapter 15 Background Debug Module (BDMV4) - - - . . . 449 Chapter 16 Debug Module (DBGV1) - - - - - . . . . 475 Chapter 17 Interrupt (INTV1) - - - - - - - 507 Chapter 18 Multiplexed External Bus Interface (MEBIV3) - - . . 515 Chapter 19 Module Mapping Control (MMCV4) - - - - 545 Appendix A Electrical Characteristics- - - - - . . . . 565 Appendix B Remended PCB Layout - - - - - . 599 Appendix C Package...