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NXP Semiconductors Electronic Components Datasheet

MIMX8MM2DVTLZAA Datasheet

8M Mini Applications Processor

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NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX8MMCEC
Rev. 0.2, 04/2019
i.MX 8M Mini Applications
Processor Datasheet for
Consumer Products
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Package Information
Plastic Package
FCBGA 14 x 14 mm, 0.5 mm pitch
Ordering Information
See Table 2 on page 6
1 i.MX 8M Mini introduction
The i.MX 8M Mini applications processor represents 1. i.MX 8M Mini introduction . . . . . . . . . . . . . . . . . . . . . . . . 1
NXP’s latest video and audio experience combining 1.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
state-of-the-art
media-specific
features
with
2.
1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 6
Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
high-performance processing while optimized for lowest 2.1. Recommended connections for unused input/output 12
power consumption.
3. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 14
3.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 14
The i.MX 8M Mini family of processors features
advanced implementation of a quad Arm® Cor-
3.2. Power supplies requirements and restrictions . . . 22
3.3. PLL electrical characteristics . . . . . . . . . . . . . . . . 26
3.4. On-chip oscillators . . . . . . . . . . . . . . . . . . . . . . . . 27
tex®-A53 core, which operates at speeds of up to
3.6. I/O AC parameters . . . . . . . . . . . . . . . . . . . . . . . 29
3.5. General purpose I/O (GPIO) DC parameters . . . 28
1.8 GHz. A general purpose Cortex®-M4 400 MHz
core processor is for low-power processing. The DRAM
3.7. Output buffer impedance parameters . . . . . . . . . 30
3.8. System modules timing . . . . . . . . . . . . . . . . . . . . 32
3.9. External peripheral interface parameters . . . . . . 33
controller supports 32-bit/16-bit LPDDR4, DDR4, and 4. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 68
4.1. Boot mode configuration pins . . . . . . . . . . . . . . . 68
DDR3L memory. A wide range of audio interfaces are 4.2. Boot device interface allocation . . . . . . . . . . . . . . 69
available,
including
I2S, AC97, TDM,
and
S/PDIF.
5.
Package information and contact assignments . . . . . . . 70
5.1. 14 x 14 mm package information . . . . . . . . . . . . 70
There are a number of other interfaces for connecting 5.2. DDR pin function list . . . . . . . . . . . . . . . . . . . . . . 87
peripherals, such as USB, PCIe, and Ethernet.
6. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
NXP reserves the right to change the production detail specifications as may be required
to permit improvements in the design of its products.


NXP Semiconductors Electronic Components Datasheet

MIMX8MM2DVTLZAA Datasheet

8M Mini Applications Processor

No Preview Available !

i.MX 8M Mini introduction
Subsystem
Arm Cortex-A53 MPCore platform
Arm Cortex-M4 core platform
Connectivity
On-chip memory
GPIO and pin multiplexing
Power management
Table 1. Features
Features
Quad symmetric Cortex-A53 processors
• 32 KB L1 Instruction Cache
• 32 KB L1 Data Cache
• Media Processing Engine (MPE) with NEON technology supporting the Advanced
Single Instruction Multiple Data architecture:
• Floating Point Unit (FPU) with support of the VFPv4-D16 architecture
Support of 64-bit Armv8-A architecture
512 KB unified L2 cache
Low power microcontroller available for customer application:
• low power standby mode
• IoT features including Weave
• Manage IR or Wireless Remote
Cortex M4 CPU:
• 16 KB L1 Instruction Cache
• 16 KB L1 Data Cache
• 256 KB tightly coupled memory (TCM)
One PCI Express (PCIe)
• Single lane supporting PCIe Gen2
• Dual mode operation to function as root complex or endpoint
• Integrated PHY interface
• Support L1 low power sub-state
Two USB 2.0 OTG controllers with integrated PHY interfaces:
• Spread spectrum clock support
Three Ultra Secure Digital Host Controller (uSDHC) interfaces:
• MMC 5.1 compliance with HS400 DDR signaling to support up to 400 MB/sec
• SD/SDIO 3.0 compliance with 200 MHz SDR signaling to support up to 100
MB/sec
• Support for SDXC (extended capacity)
One Gigabit Ethernet controller with support for Energy Efficient Ethernet (EEE),
Ethernet AVB, and IEEE 1588
Four Universal Asynchronous Receiver/Transmitter (UART) modules
Four I2C modules
Three ECSPI modules
Boot ROM (256 KB)
On-chip RAM (256 KB + 32 KB)
General-purpose input/output (GPIO) modules with interrupt capability
Input/output multiplexing controller (IOMUXC) to provide centralized pad control
Temperature sensor with programmable trip points
Flexible power domain partitioning with internal power switches to support efficient
power management
i.MX 8M Mini Applications Processor Datasheet for Consumer Products, Rev. 0.2, 04/2019
2
NXP Semiconductors


Part Number MIMX8MM2DVTLZAA
Description 8M Mini Applications Processor
Maker NXP
Total Page 3 Pages
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