MIMX8MQ7CVAHZAA
Key Features
- Quad symmetric Cortex-A53 processors
- 32 KB L1 Instruction Cache
- 32 KB L1 Data Cache
- Support L1 cache RAMs protection with parity/ECC Support of 64-bit Armv8-A architecture
- 1 MB unified L2 cache
- Support L2 cache RAMs protection with ECC
