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NXP Semiconductors Electronic Components Datasheet

MIMX8MQ7CVAHZAB Datasheet

Applications Processors

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NXP Semiconductors
Data Sheet: Technical Data
i.MX 8M Dual / 8M
QuadLite / 8M Quad
Applications Processors
Data Sheet for Industrial
Products
Document Number: IMX8MDQLQIEC
Rev. 1.1, 07/2019
MIMX8MQ7CVAHZAA
MIMX8MQ6CVAHZAA
MIMX8MD7CVAHZAA
MIMX8MD6CVAHZAA
MIMX8MQ5CVAHZAA
MIMX8MQ7CVAHZAB
MIMX8MQ6CVAHZAB
MIMX8MD7CVAHZAB
MIMX8MD6CVAHZAB
MIMX8MQ5CVAHZAB
Package Information
Bare Die Package
FBGA 17 x 17 mm, 0.65 mm pitch
Ordering Information
See Table 2 on page 6
1 i.MX 8M Dual / 8M QuadLite
/ 8M Quad introduction
The i.MX 8M Dual / 8M QuadLite / 8M Quad processors 1. i.MX 8M Dual / 8M QuadLite / 8M Quad introduction . . . 1
represent NXP’s latest market of connected streaming 1.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
audio/video
devices,
scanning/imaging
devices,
and
2.
1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 6
Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
various devices requiring high-performance, low-power 2.1. Recommended connections for unused interfaces 12
processors.
3. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 13
3.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 13
The i.MX 8M Dual / 8M QuadLite / 8M Quad processors
feature advanced implementation of a quad Arm®
3.2. Power supplies requirements and restrictions . . . 25
3.3. PLL electrical characteristics . . . . . . . . . . . . . . . . 27
3.4. On-chip oscillators . . . . . . . . . . . . . . . . . . . . . . . . 28
Cortex®-A53 core, which operates at speeds of up to
1.3 GHz. A general purpose Cortex®-M4 core processor
is for low-power processing. The DRAM controller
supports 32-bit/16-bit LPDDR4, DDR4, and DDR3L
memory. There are a number of other interfaces for
3.5. I/O DC parameters . . . . . . . . . . . . . . . . . . . . . . . 30
3.6. I/O AC parameters . . . . . . . . . . . . . . . . . . . . . . . 32
3.7. Output buffer impedance parameters . . . . . . . . . 35
3.8. System modules timing . . . . . . . . . . . . . . . . . . . . 37
3.9. External peripheral interface parameters . . . . . . 38
4. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 74
4.1. Boot mode configuration pins . . . . . . . . . . . . . . . 74
connecting peripherals, such as WLAN, Bluetooth, GPS,
displays, and camera sensors. The i.MX 8M Quad and
i.MX 8M Dual processors have hardware acceleration
for video playback up to 4K, and can drive the video
4.2. Boot device interface allocation . . . . . . . . . . . . . . 75
5. Package information and contact assignments . . . . . . . 76
5.1. 17 x 17 mm package information . . . . . . . . . . . . 76
5.2. DDR pin function list for 17 x 17 mm package . . 96
6. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
outputs up to 60 fps. Although the i.MX 8M QuadLite
processor does not have hardware acceleration for video
decode, it allows for video playback with software
decoders if needed.
NXP reserves the right to change the production detail specifications as may be required
to permit improvements in the design of its products.


NXP Semiconductors Electronic Components Datasheet

MIMX8MQ7CVAHZAB Datasheet

Applications Processors

No Preview Available !

i.MX 8M Dual / 8M QuadLite / 8M Quad introduction
Subsystem
Arm Cortex-A53 MPCore platform
Arm Cortex-M4 core platform
Connectivity
External memory interface
GPIO and pin multiplexing
On-chip memory
Power management
Table 1. Features
Feature
Quad symmetric Cortex-A53 processors:
• 32 KB L1 Instruction Cache
• 32 KB L1 Data Cache
• Support L1 cache RAMs protection with parity/ECC
Support of 64-bit Armv8-A architecture:
• 1 MB unified L2 cache
• Support L2 cache RAMs protection with ECC
• Frequency of 1.5 GHz
16 KB L1 Instruction Cache
16 KB L1 Data Cache
256 KB tightly coupled memory (TCM)
Two PCI Express Gen2 interfaces
Two USB 3.0/2.0 controllers with integrated PHY interfaces
Two Ultra Secure Digital Host Controller (uSDHC) interfaces
One Gigabit Ethernet controller with support for EEE, Ethernet AVB, and IEEE 1588
Four Universal Asynchronous Receiver/Transmitter (UART) modules
Four I2C modules
Three SPI modules
32/16-bit DRAM interface: LPDDR4-3200, DDR4-2400, DDR3L-1600
8-bit NAND-Flash
eMMC 5.0 Flash
SPI NOR Flash
QuadSPI Flash with support for XIP
GPIO modules with interrupt capability
Input/output multiplexing controller (IOMUXC) to provide centralized pad control
Boot ROM (128 KB)
On-chip RAM (128 KB + 32 KB)
Temperature sensor with programmable trip points
Flexible power domain partitioning with internal power switches to support efficient
power management
i.MX 8M Dual / 8M QuadLite / 8M Quad Applications Processors Data Sheet for Industrial Products, Rev. 1.1, 07/2019
2
NXP Semiconductors


Part Number MIMX8MQ7CVAHZAB
Description Applications Processors
Maker NXP
Total Page 3 Pages
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