MK24FN1M0VDC12 Datasheet | NXP Semiconductors

NXP Semiconductors Data Sheet: Technical Data K24P144M120SF5 Rev. 7, 11/2016 Kinetis K24F Sub-Family Data Sheet 120 MHz ARM® Cortex®-M4-based Microcontroller with FPU The K24 product family members are optimized for cost-sensitive applications requiring low-power, USB connectivity, and up to 256 KB of embedded SRAM. These devices share the prehensive enablement and scalability of the Kinetis family. This product offers: - Run power consumption down to 250 μA/MHz. Static power consumption down to 5.8 μA with full state retention and 5 μs wakeup. Lowest Static mode down to 339 n A - USB LS/FS OTG 2.0 with embedded 3.3 V, 120 m A LDO Vreg, with USB device crystal-less operation MK24FN1M0VLQ12 MK24FN1M0VLL12 MK24FN1M0VDC12 121 XFBGA 144 LQFP 8 x 8 x 0.5 mm Pitch 20 x 20 x 1.6 mm Pitch 0.65 mm 0.5 mm 100 QFP 14 x 14 x 1.7 mm Pitch 0.5 mm Performance - Up to 120 MHz ARM® Cortex®-M4 core with DSP instructions and floating point unit Memories and memory interfaces - Up to 1 MB program flash memory and 256 KB RAM - Flex Bus external bus interface System peripherals - Multiple low-power modes, low-leakage wake-up unit - Memory protection unit with multi-master protection - 16-channel DMA controller - External watchdog monitor and software watchdog Security and integrity modules - Hardware CRC module - Hardware random-number generator - Hardware encryption supporting DES, 3DES, AES, MD5, SHA-1, and SHA-256 algorithms - 128-bit unique identification (ID) number per...