MPC5668E Datasheet | NXP Semiconductors

features : - 32-bit CPU core plex (e200z650) - pliant with Power Architecture embedded category - 32 KB unified cache with line locking and eight-entry store buffer16 - Execution speed static to 116 MHz - 32-bit I/O processor (e200z0) - Execution speed static to 1/2 CPU core speed (58 MHz) - 2 MB on-chip flash - Supports read during program and erase operations, and multiple blocks allowing EEPROM emulation - 512 KB + 80 KB (592 KB) on-chip ECC SRAM (MPC5668G) - 128 KB on-chip ECC SRAM (MPC5668E) - 16-entry Memory Protection Unit (MPC5668E only) - Direct memory access controller - 16-channel on MPC5668G - 32-channel on MPC5668E - Fast ethernet controller - Supports 10-Mbps and 100-Mbps IEEE 802.3 MII, 10-Mbps 7-wire interface - IEEE 802.3 MAC (pliant with IEEE 802.3 1998 edition) - Media Local Bus (MLB) interface (MPC5668G only) - Supports 16 logical channels, max speed 1024 Fs - Interrupt controller (INTC) supports 316 external interrupt vectors (22 are reserved) - System clocks - Frequency-modulated phase-locked loop (FMPLL) - 4 - 40 MHz crystal oscillator (XTAL) - 32 k Hz crystal oscillator (XTAL) - Dedicated 16 MHz and 128 k Hz internal RC oscillators - Analog to Digital Converter (ADC) module - 10-bit A/D resolution - 32 external channels - 36 internal channels (MPC5668G) - 64 internal channels (MPC5668E) - Cross-Triggering Unit (MPC5668E only) - Internal conversion triggering for ADC - Triggerable by internal timers or e MIOS200 - Deserial Serial Peripheral Interface (DSPI) - Four individual DSPI modules - Full duplex, synchronous...