MPC5746C
Key Features
- System Memory Protection Unit (SMPU) with up to 32 region descriptors and 16-byte region granularity
- 16 Semaphores to manage access to shared resources
- Interrupt controller (INTC) capable of routing interrupts to any CPU
- Crossbar switch architecture for concurrent access to peripherals, flash memory, and RAM from multiple bus masters MPC5746C
- 32-channel eDMA controller with multiple transfer request sources using DMAMUX
- Boot Assist Flash (BAF) supports internal flash programming via a serial link (SCI)
- Audio - Synchronous Audio Interface (SAI) - Fractional clock dividers (FCD) operating in conjunction with the SAI
- Configurable I/O domains supporting FlexCAN, LINFlexD, Ethernet, and general I/O
- Supports wake-up from low power modes via the WKPU controller
- On-chip voltage regulator (VREG)
