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NXP Semiconductors Electronic Components Datasheet

P82B96 Datasheet

Dual bidirectional bus buffer

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P82B96
Dual bidirectional bus buffer
Rev. 08 — 10 November 2009
Product data sheet
1. General description
The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface
between the normal I2C-bus and a range of other bus configurations. It can interface
I2C-bus logic signals to similar buses having different voltage and current levels.
For example, it can interface to the 350 µA SMBus, to 3.3 V logic devices, and to 15 V
levels and/or low-impedance lines to improve noise immunity on longer bus lengths.
It achieves this interface without any restrictions on the normal I2C-bus protocols or clock
speed. The IC adds minimal loading to the I2C-bus node, and loadings of the new bus or
remote I2C-bus nodes are not transmitted or transformed to the local node. Restrictions
on the number of I2C-bus devices in a system, or the physical separation between them,
are virtually eliminated. Transmitting SDA and SCL signals via balanced transmission
lines (twisted pairs) or with galvanic isolation (opto-coupling) is simple because separate
directional Tx and Rx signals are provided. The Tx and Rx signals may be directly
connected, without causing latching, to provide an alternative bidirectional signal line with
I2C-bus properties.
2. Features
I Bidirectional data transfer of I2C-bus signals
I Isolates capacitance allowing 400 pF on Sx/Sy side and 4000 pF on Tx/Ty side
I Tx/Ty outputs have 60 mA sink capability for driving low-impedance or high capacitive
buses
I 400 kHz operation over at least 20 meters of wire (see AN10148)
I Supply voltage range of 2 V to 15 V with I2C-bus logic levels on Sx/Sy side
independent of supply voltage
I Splits I2C-bus signal into pairs of forward/reverse Tx/Rx, Ty/Ry signals for interface
with opto-electrical isolators and similar devices that need unidirectional input and
output signal paths.
I Low power supply current
I ESD protection exceeds 3500 V HBM per JESD22-A114, 250 V DIP package, 400 V
SO package MM per JESD22-A115, and 1000 V CDM per JESD22-C101
I Latch-up free (bipolar process with no latching structures)
I Packages offered: DIP8, SO8 and TSSOP8


NXP Semiconductors Electronic Components Datasheet

P82B96 Datasheet

Dual bidirectional bus buffer

No Preview Available !

NXP Semiconductors
P82B96
Dual bidirectional bus buffer
3. Applications
I Interface between I2C-buses operating at different logic levels (for example, 5 V and
3 V or 15 V)
I Interface between I2C-bus and SMBus (350 µA) standard
I Simple conversion of I2C-bus SDA or SCL signals to multi-drop differential bus
hardware, for example, via compatible PCA82C250
I Interfaces with opto-couplers to provide opto-isolation between I2C-bus nodes up to
400 kHz
4. Ordering information
Table 1. Ordering information
Type number
Package
Name Description
P82B96DP
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm
P82B96PN
DIP8
plastic dual in-line package; 8 leads (300 mil)
P82B96TD
SO8
plastic small outline package; 8 leads;
body width 3.9 mm
P82B96TD/S900 SO8
plastic small outline package; 8 leads;
body width 3.9 mm
Version
SOT505-1
SOT97-1
SOT96-1
SOT96-1
4.1 Ordering options
Table 2. Ordering options
Type number
Topside mark
P82B96DP
82B96
P82B96PN
P82B96PN
P82B96TD
P82B96T
P82B96TD/S900 P82B96T
Temperature range
40 °C to +85 °C
40 °C to +85 °C
40 °C to +85 °C
40 °C to +125 °C
P82B96_8
Product data sheet
Rev. 08 — 10 November 2009
© NXP B.V. 2009. All rights reserved.
2 of 32


Part Number P82B96
Description Dual bidirectional bus buffer
Maker NXP
Total Page 3 Pages
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