P89LPC935FA NXP Semiconductors Datasheet

P89LPC935FA Key Features

• 4 kB/8 kB/16 kB byte-erasable flash code memory organized into 1 kB/2 kB sectors and 64-byte pages. Single-byte erasing
• 256-byte RAM data memory. Both the P89LPC935 and P89LPC936 also include a 512-byte auxiliary on-chip RAM
• 512-byte customer data EEPROM on chip allows serialization of devices, storage of setup parameters, etc. (P89LPC935/936)
• Dual 4-input multiplexed 8-bit A/D converters/DAC outputs (P89LPC935/936, single A/D on P89LPC933/934).Two analog parato
• Two 16-bit counter/timers (each may be configured to toggle a port output upon timer overflow or to bee a PWM output) an
• Enhanced UART with fractional baud rate generator, break detect, framing error detection, and automatic address detectio
• Capture/pare Unit (CCU) provides PWM, input capture, and output pare functions (P89LPC935/936)
• High-accuracy internal RC oscillator option allows operation without external oscillator ponents. The RC oscillator opti
• 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V)
• 28-pin TSSOP, PLCC, and HVQFN packages with 23 I/O pins minimum and up to 26 I/O pins while using on-chip oscillator and