PCK857 driver equivalent, 66-150mhz phase locked loop differential 1:10 sdram clock driver.
* Optimized for clock distribution in DDR (Double Data Rate)
SDRAM applications
PIN CONFIGURATION
GND 1 Y0 2 Y0 3 VDDQ 4 Y1 5 Y1 6 GND 7 GND 8 Y2 9 Y2 10 VDDQ 11 VD.
PIN CONFIGURATION
GND 1 Y0 2 Y0 3 VDDQ 4 Y1 5 Y1 6 GND 7 GND 8 Y2 9 Y2 10 VDDQ 11 VDDQ 12 CLK 13 CLK 14 VDDQ 15 AVCC 16.
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