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PCK857 Datasheet, NXP

PCK857 Datasheet, NXP

PCK857

datasheet Download (Size : 62.59KB)

PCK857 Datasheet

PCK857 driver

66-150mhz phase locked loop differential 1:10 sdram clock driver.

66-150mhz phase locked loop differential 1:10 sdram clock driver.

PCK857

datasheet Download (Size : 62.59KB)

PCK857 Datasheet

PCK857 Features and benefits

PCK857 Features and benefits


* Optimized for clock distribution in DDR (Double Data Rate) SDRAM applications PIN CONFIGURATION GND 1 Y0 2 Y0 3 VDDQ 4 Y1 5 Y1 6 GND 7 GND 8 Y2 9 Y2 10 VDDQ 11 VD.

PCK857 Application

PCK857 Application

PIN CONFIGURATION GND 1 Y0 2 Y0 3 VDDQ 4 Y1 5 Y1 6 GND 7 GND 8 Y2 9 Y2 10 VDDQ 11 VDDQ 12 CLK 13 CLK 14 VDDQ 15 AVCC 16.

PCK857 Description

PCK857 Description

Zero delay buffer to distribute an SSTL differential clock input pair to 10 SSTL_2 differential output pairs. Outputs are slope controlled. External feedback pin for synchronization of the outputs to the input. A CMOS style Enable/Disable pin is prov.

Image gallery

PCK857 Page 1 PCK857 Page 2 PCK857 Page 3

TAGS

PCK857
66-150MHz
Phase
Locked
Loop
Differential
110
SDRAM
Clock
Driver
NXP

Manufacturer


NXP (https://www.nxp.com/)

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