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PCK857 Datasheet 66-150MHz Phase Locked Loop Differential 1:10 SDRAM Clock Driver

Manufacturer: NXP Semiconductors

General Description

Zero delay buffer to distribute an SSTL differential clock input pair to 10 SSTL_2 differential output pairs.

Outputs are slope controlled.

External feedback pin for synchronization of the outputs to the input.

Overview

INTEGRATED CIRCUITS PCK857 66–150MHz Phase Locked Loop Differential 1:10 SDRAM Clock Driver Preliminary specification 1998 Dec 10 Philips Semiconductors Philips Semiconductors Preliminary specification 66–150MHz Phase.

Key Features

  • Optimized for clock distribution in DDR (Double Data Rate) SDRAM.