PCK953 driver equivalent, 50-125 mhz pecl input/9 cmos output 3.3 v pll clock driver.
make the PCK953 ideal for use as a zero delay, low skew fanout buffer. The device performance has been tuned and optimized for zero delay performance. The MR/OE input pin.
info section).
PLL INPUT REFERENCE CHARACTERISTICS
Tamb = 0 to 70°C SYMBOL fref frefDC PARAMETER Reference input freque.
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