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NXP Semiconductors Electronic Components Datasheet

PTN5100 Datasheet

PHY/protocol

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PTN5100
USB Type-C power delivery PHY and protocol IC
Rev. 1.1 — 25 July 2017
Product data sheet
1. General description
PTN5100 is a single port USB Type-C Power Delivery (PD) PHY and Protocol IC that
provides Type-C Configuration channel interface and USB PD Physical and Protocol layer
functions to a System PD Port Policy Controller (Policy Engine and Device Policy
Manager, Alternate mode controller). It complies with USB PD[1] and Type-C[2]
specifications and delta updates of PD spec. This IC is targeted for a wide range of
platforms (Standard Notebook PCs, Desktop PCs, Chromebooks, Tablets, Convertibles,
Smart phones) and PC Accessories (e.g. Docks, Monitors, Cable adapters etc.)
applications. PTN5100 is architected to deliver robust performance, compliant behavior,
configurability and system implementation flexibility that are essential to tide over
interoperability and compliance hurdles in the platform applications.
PTN5100 can support system realization of the following PD roles: (i) Provider (P) only, (ii)
Provider/Consumer (P/C) (iii) Consumer only (C) (iv) Consumer/Provider (C/P). Further, it
can be register programmed to operate in Type-C specific Upstream Facing Port (UFP),
Downstream Facing Port (DFP) or Dual Role Port (DRP) role.
PTN5100 implements VCONN low RON switch with register programmable Forward
Current protection feature. The VCON switch also provides Reverse current protection
feature to detect reverse current flow into the system whenever (inductive or) charged
cable is unplugged from the connector.
PTN5100 operates from platform power supply VDD, or it can also be powered from USB
power VBUS directly, which is especially required for operation under Dead Battery (DB)
condition and certain platform use cases. The host interface operates on VIO supply to
facilitate interfacing to systems that use IO supply rail different from VDD supply rail.
It provides SPI/I2C interface for system host control/status update. The interface choice is
pre- configured in NXP factory.
PTN5100 is available in a small footprint package option: HVQFN20 4 mm x 4 mm,
0.5 mm pitch.
Remark:
1. The term 'EC' is used interchangeably with 'Embedded Controller', 'AP', 'Application
Processor' or 'System Management Controller, SMC' or System Host Controller
throughout this document.
2. The terms 'PMIC', 'Power Management Interface Controller', 'Charger IC' are used
interchangeably throughout this document.


NXP Semiconductors Electronic Components Datasheet

PTN5100 Datasheet

PHY/protocol

No Preview Available !

NXP Semiconductors
PTN5100
USB Type-C power delivery PHY and protocol IC
2. Features and benefits
2.1 USB PD and Type-C Features
Complies with USB PD[1] and USB Type-C[2] specifications.
Supports implementation of various system PD roles: P, P/C, C, C/P
Supports Type-C role configurability
Type-C role (DFP, UFP, DRP) is Non-Volatile Memory (NVM) and register
programmable based on OEM platform requirements
Implements UFP role pull down behavior to handle dead battery condition on
battery powered platforms
Supports register programmable and variable ‘Rp’ indication (for DRP/DFP usage
and accessory detection)
Implements 'Rd' indication on CC pin (for Device side implementation)
CC detection/indication scheme based on Type-C role
Indication of orientation detection via CC_ORIENT pin and status register(s)
Debug and Audio Accessory detection and indication in status register(s)
Cooperatively works under the control of Policy controller MCU for power delivery
negotiation and contract(s), Alternate mode and VDM exchanges
Implements BMC (de)coding, 4B5B symbol (de)coding, CRC generation/checking,
PD packet assembling/disassembling including Preamble, SOP, EOP, Good CRC
response, Retries, Hard and Cable resets
PD PHY and Protocol layer interface control and status update handled via SPI/I2C
interface
SOP* Configurability
Register programmable to generate and receive SOP, SOP', SOP'-debug, SOP",
SOP"-debug'' in DFP/DRP (host use case)
Register programmable to receive and respond on SOP, SOP'-debug and
SOP"-debug commands
Supports low RON VCONN switch with enable/disable (Hi-Z) support
Capable of maximum current delivery of 1 A over 2.7 V to 5.5 V
Supports register programmable Forward current protection control
Supports register programmable Reverse current protection
2.2 System protection features
Back current protection on all pins when PTN5100 is unpowered
CC1 and CC2 pins are 5.5 V tolerant
VBUS pin and VBUS power path MOSFET enable pins are 28 V tolerant
2.3 General
Delivers (active LOW enable) gate control signals for PMOS Power MOSFETs on
VBUS source and sink power paths
Provides dedicated IO pin (CC_ORIENT) for indicating Cable/plug orientation and IO
pin (DBGACC_FOUND) for indicating Debug accessory detection
Delivers up to 30 mA (max) for powering Policy controller MCU
Supports SPI slave interface (SPI modes 1 and 2 supported) up to 30 MHz
PTN5100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1.1 — 25 July 2017
© NXP Semiconductors N.V. 2017. All rights reserved.
2 of 53


Part Number PTN5100
Description PHY/protocol
Maker NXP
Total Page 3 Pages
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