USB Type-C power delivery PHY and protocol IC
Rev. 1 — 2 August 2016
Product data sheet
1. General description
PTN5100D is a single port USB Type-C Power Delivery (PD) PHY and Protocol IC that
provides Type-C Configuration channel interface and USB PD Physical and Protocol layer
functions to a System PD Port Policy Controller (Policy Engine and Device Policy
Manager, Alternate mode controller). It complies with USB PD and Type-C
specifications. PTN5100D is architected to deliver robust performance, compliant
behavior, configurability and system implementation flexibility that are essential to tide
over interoperability and compliance hurdles in the platform applications.
PTN5100D can support system realization of the following PD roles: (i) Consumer only
(ii) Consumer/Provider. Further, it is register programmed to operate in Type-C specific
Upstream Facing Port (UFP). It can work along with the PD policy controller to operate in
other modes (DFP, DRP).
PTN5100D operates from platform power supply VDD, or it can also be powered from
USB power VBUS directly. The host interface operates on VIO supply to facilitate
interfacing to systems that use IO supply rail different from VDD supply rail.
It provides SPI/I2C interface for system host control/status update. The interface choice is
pre-configured in NXP factory.
PTN5100D is available in a small footprint package option: HVQFN20 4 mm x 4 mm,
0.5 mm pitch.
2. Features and benefits
2.1 USB PD and Type-C Features
Complies with USB PD and USB Type-C specifications.
Supports implementation of various system PD roles: Consumer, Consumer/Provider
Supports Type-C role configurability
Type-C role (UFP, DFP)
Implements UFP role pull down behavior to handle dead battery condition on
battery powered platforms
Implements 'Rd' indication on CC pin
Cooperatively works under the control of Policy controller MCU for power delivery
negotiation and contract(s), Alternate mode and VDM exchanges
Implements BMC (de)coding, 4B5B symbol (de)coding, CRC generation/checking,
PD packet assembling/disassembling including Preamble, SOP, EOP, Good CRC
response, Retries, Hard and Cable resets
PD PHY and Protocol layer interface control and status update handled via SPI/I2C