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UJA1023T - LIN-I/O slave

Download the UJA1023T datasheet PDF. This datasheet also covers the UJA1023 variant, as both devices belong to the same lin-i/o slave family and are provided as variant models within a single manufacturer datasheet.

General Description

The UJA1023 is a stand-alone Local Interconnect Network (LIN) I/O slave that replaces basic components commonly used in electronic control units for input and output handling.

Key Features

  • Automatic bit rate synchronization to any (master) bit rate between 1 kbit/s and 20 kbit/s.
  • Integrated LIN 2.0 / SAE J2602 transceiver (including 30 kΩ termination resistor).
  • Eight bidirectional I/O pins.
  • 4 × 2, 4 × 3, or 4 × 4 switch matrix to support reading and supplying a maximum number of 16 switches.
  • Outputs configurable as high-side and/or low-side driver and as cyclic or PWM driver.
  • 8-bit ADC.
  • Advanced low-power behavior.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (UJA1023_PhilipsSemiconductors.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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UJA1079 LIN core system basis chip NXP Semiconductors

Other Datasheets by NXP Semiconductors

Part Number Description
UJA1023 LIN-I/O slave
UJA1018 LIN transceiver
UJA1061 Fault-tolerant CAN/LIN fail-safe system basis chip
UJA1061TW Fault-tolerant CAN/LIN fail-safe system basis chip
UJA1065 High-speed CAN/LIN fail-safe system basis chip

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
UJA1023 LIN-I/O slave Rev. 5 — 17 August 2010 Product data sheet 1. General description The UJA1023 is a stand-alone Local Interconnect Network (LIN) I/O slave that replaces basic components commonly used in electronic control units for input and output handling. The UJA1023 contains a LIN 2.0 controller, an integrated LIN transceiver which is LIN 2.0 / SAE J2602 compliant and LIN 1.3 compatible, a 30 kΩ termination resistor necessary for LIN-slaves, and eight I/O ports which are configurable via the LIN bus. An automatic bit rate synchronization circuit adapts to any (master) bit rate between 1 kbit/s and 20 kbit/s. For this, an oscillator is integrated.