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UJA1164A - Mini high-speed CAN system

General Description

The UJA1164A is a mini high-speed CAN System Basis Chip (SBC) containing an ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant HS-CAN transceiver and an integrated 5 V/100 mA supply for a microcontroller.

Key Features

  • 2.1 General.
  • ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant high-speed CAN transceiver.
  • Hardware and software compatible with the UJA116x product family and with improved EMC performance.
  • Loop delay symmetry timing enables reliable communication at data rates up to 5 Mbit/s in the CAN FD fast phase.
  • Autonomous bus biasing according to ISO 11898-6.
  • Fully integrated 5 V/100 mA low-drop voltage regulator for 5 V microcontroller supply (V1).
  • Bus connections a.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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UJA1164A Mini high-speed CAN system basis chip with Standby mode & watchdog Rev. 1 — 23 August 2019 Product data sheet 1. General description The UJA1164A is a mini high-speed CAN System Basis Chip (SBC) containing an ISO 11898-2:2016 and SAE J2284-1 to SAE J2284-5 compliant HS-CAN transceiver and an integrated 5 V/100 mA supply for a microcontroller. It also features a watchdog and a Serial Peripheral Interface (SPI). The UJA1164A can be operated in very-low-current Standby mode with bus wake-up capability and supports 11898-2:2016 compliant autonomous CAN biasing. This implementation enables reliable communication in the CAN FD fast phase at data rates up to 5 Mbit/s.