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74AUP1G373 Datasheet Low-power D-type transparent latch

Manufacturer: NXP Semiconductors

General Description

The 74AUP1G373 provides the single D-type transparent latch with 3-state output.

While the latch-enable (LE) input is high, the Q output follows the data (D) input.

When pin LE is LOW, the latch stores the information that was present at the D-input one set-up time preceding the HIGH-to-LOW transition of pin LE.

Overview

74AUP1G373 Low-power D-type transparent latch; 3-state Rev.

03 — 9 January 2008 www.DataSheet4U.com Product data sheet 1.

Key Features

  • s Wide supply voltage range from 0.8 V to 3.6 V s High noise immunity s Complies with JEDEC standards: x JESD8-12 (0.8 V to 1.3 V) x JESD8-11 (0.9 V to 1.65 V) x JESD8-7 (1.2 V to 1.95 V) x JESD8-5 (1.8 V to 2.7 V) x JESD8-B (2.7 V to 3.6 V) s ESD protection: x HBM JESD22-A114E Class 3A exceeds 5000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101-C exceeds 1000 V s Low static power consumption; ICC = 0.9 µA (maximum) s Latch-up performance exceeds 100 mA per JESD 78 Class II s Inputs accept.