Datasheet Details
| Part number | 74AUP1G386 |
|---|---|
| Manufacturer | NXP Semiconductors |
| File Size | 115.30 KB |
| Description | Low-power 3-input EXCLUSIVE-OR gate |
| Datasheet |
|
|
|
|
| Part number | 74AUP1G386 |
|---|---|
| Manufacturer | NXP Semiconductors |
| File Size | 115.30 KB |
| Description | Low-power 3-input EXCLUSIVE-OR gate |
| Datasheet |
|
|
|
|
The 74AUP1G386 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
74AUP1G386 Low-power 3-input EXCLUSIVE-OR gate Rev.
02 — 10 January 2008 www.DataSheet4U.com Product data sheet 1.
| Brand Logo | Part Number | Description | Manufacturer |
|---|---|---|---|
![]() |
74AUP1G386 | Low-power 3-input EXCLUSIVE-OR gate | nexperia |
| Part Number | Description |
|---|---|
| 74AUP1G373 | Low-power D-type transparent latch |
| 74AUP1G00 | Low-power 2-input NAND gate |
| 74AUP1G04 | Low-power inverter |
| 74AUP1G06 | Low-power inverter |
| 74AUP1G07 | Low-power buffer |
| 74AUP1G08 | Low-power 2-input AND gate |
| 74AUP1G125 | Low-power buffer/line driver |
| 74AUP1GU04 | Low-power unbuffered inverter |
| 74AUP2G07 | Low-power dual buffer |
| 74AUP2G125 | Low-power dual buffer/line driver |