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PCA9542A - 2-channel I2C-bus multiplexer and interrupt logic

General Description

The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.

The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.

Only one SCx/SDx channel is selected at a time, determined by the contents of the programmable control register.

Key Features

  • I I I I I I I I I I I I I I I I 1-of-2 bidirectional translating multiplexer I2C-bus interface logic; compatible with SMBus 2 active LOW interrupt inputs (INT0, INT1) Active LOW interrupt output (INT) 3 address pins allowing up to 8 devices on the I2C-bus Channel selection via I2C-bus Powers up with all multiplexer channels deselected Low Ron switches Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses No glitch on power-up Supports hot insertion Low standby current Operat.

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Full PDF Text Transcription for PCA9542A (Reference)

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PCA9542A Rev. 03 — 24 November 2008 www.DataSheet4U.com 2-channel I2C-bus multiplexer and interrupt logic Product data sheet 1. General description The PCA9542A is a 1-of...

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logic Product data sheet 1. General description The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus. The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels. Only one SCx/SDx channel is selected at a time, determined by the contents of the programmable control register. Two interrupt inputs, INT0 and INT1, one for each of the SCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as an AND of the two interrupt inputs, is provided. A power-on reset function puts the registers in their default state and initializes the I2C-bus state machine